6.374 Analysis and Design of Digital Integrated Circuits
Device and circuit level optimization of digital building blocks. MOS device models including Deep Sub-Micron effects. Circuit design styles for logic, arithmetic, and sequential blocks. Estimation and minimization of energy consumption. Interconnect models and parasitics, device sizing and logical effort, timing issues (clock skew and jitter), and active clock distribution techniques. Memory architectures, circuits (sense amplifiers), and devices. Testing of integrated circuits. Extensive custom and standard cell layout and simulation in design projects and software labs.
Lecture occurs 11:00 AM to 12:30 PM on Tuesdays and Thursdays in 34-302.
This class counts for a total of 12 credits.
MIT 6.374 Analysis and Design of Digital Integrated Circuits Related Textbooks
MIT 6.374 Analysis and Design of Digital Integrated Circuits On The Web
© Copyright 2015 Yasyf Mohamedali