6.175 Constructive Computer Architecture


Class Info

Illustrates a constructive (as opposed to a descriptive) approach to computer architecture. Topics include combinational and pipelined arithmetic-logic units (ALU), in-order pipelined microarchitectures, branch prediction, blocking and unblocking caches, interrupts, virtual memory support, cache coherence and multicore architectures. Labs in a modern Hardware Design Language (HDL) illustrate various aspects of microprocessor design, culminating in a term project in which students present a multicore design running on an FPGA board.

This class has 6.004 as a prerequisite.

6.175 will be offered this semester (Fall 2017). It is instructed by A. Mithal.

Lecture occurs 3:00 PM to 4:00 PM on Mondays, Wednesdays and Fridays in 34-302.

This class counts for a total of 12 credits.

You can find more information at the MIT 6.175 - Constructive Computer Architecture site.

MIT 6.175 Constructive Computer Architecture Related Textbooks
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