6.175 Constructive Computer Architecture

Class Info

Illustrates a constructive (as opposed to a descriptive) approach to computer architecture. Topics include combinational and pipelined arithmetic-logic units (ALU), in-order pipelined microarchitectures, branch prediction, blocking and unblocking caches, interrupts, virtual memory support, cache coherence and multicore architectures. Labs in a modern Hardware Design Language (HDL) illustrate various aspects of microprocessor design, culminating in a term project in which students present a multicore design running on an FPGA board.

This class has 6.004 as a prerequisite.

6.175 will not be offered this semester. It will be available in the Fall semester, and will be instructed by .

This class counts for a total of 12 credits.

You can find more information at the MIT + 6.175 - Google Search site.

MIT 6.175 Constructive Computer Architecture Related Textbooks
MIT 6.175 Constructive Computer Architecture On The Web

© Copyright 2015